Tin and tin alloys have been used as solderable surface or solder material in the manufacture of electronic devices such as printed circuit boards (PCB) and IC substrates since a long time.
A more recent development is the deposition of tin and tin alloys as a solder material by electroplating into recessed structures of an electronic device. The tin or tin alloy deposit can be either plated by pattern plating or panel plating.
A panel plating method for manufacture of solder deposits is disclosed in EP 2180770 A1.
A substrate surface having bonding pads made of e.g. copper is coated with a solder mask material and openings are formed into the solder mask material to expose the bonding pads. Such openings are referred herein as recessed structures. Other types of recessed structures are formed through the dielectric substrate of an electronic device, to a resist material or through more than one of such layers.
Next, a conductive seed layer is deposited onto the whole surface of the substrate and the surface of the recessed structures. Tin or a tin alloy is then deposited by electroplating onto the conductive seed layer in order to fill the recessed structures.
However, when filling the recessed structures completely with tin or a tin alloy a certain amount of tin or tin alloy is deposited at the same time onto the surface of the conductive seed layer which is not covering the recessed structures. Such an excess layer of tin or a tin alloy is always required for a complete filling of the recessed structures.
Next, said excess tin or a tin alloy on top of the recessed structures filled with tin or a tin alloy is removed.
This task can be achieved by depositing an etch resist onto the surface of the tin or tin alloy which is aligned with the recessed structures followed by etching away the excess layer of tin or a tin alloy not covered by the etch resist. Such a process is disclosed in US 2006/0219567 A1. The drawbacks of this method are manifold: a) the resulting recessed structures filled with tin or a tin alloy have a height exceeding that of the surrounding solder mask material. This leads to misalignment of solder material deposited by (screen-)printing of additional solder material in successive process steps and b) such a process requires several more process steps.
The panel plating method for manufacture of solder deposits disclosed in EP 2180770 A1 requires an etching solution for tin or tin alloys which is controllable to such an extend that no etch resist is required. The etching attack must be very homogenous to lead to a smooth and planar surface of the recessed structures filled with tin or a tin alloy when removing the excess layer of tin or tin alloy.
Aqueous etching solutions for tin and tin alloys known in the art (Jordan: The Electrodeposition of Tin and its Alloys, 1995, p. 373-377) fail in a way that tin or a tin alloy plated into a recessed structure is removed at a higher speed than the excess tin or tin alloy layer on top of the solder mask material. The result are dimples in the recessed structures filled with tin or a tin alloy (FIG. 1). Such dimples must be avoided as they lead in later process steps to solder joints which are not stable and reliable.